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Precision timing device with 48-VFQFN exposed pad package
LFCSP-48Manufacturer:
Mfr.Part #:
AD9512BCPZ
Datasheet:
Pbfree Code:
No
Part Life Cycle Code:
Active
Pin Count:
48
Reach Compliance Code:
compliant
EDA/CAD Models:
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Designed to operate on a single 3.3 V supply voltage, the AD9512BCPZ supports both LVDS and LVPECL input clock signals, and its programmable output divider and phase error correction circuitry guarantee accurate clock distribution and synchronization across multiple channels. Additionally, it comes equipped with an integrated reference clock buffer, programmable output skew control, and on-chip temperature compensation, all contributing to improved timing accuracy
Source Content uid | AD9512BCPZ | Pbfree Code | No |
Part Life Cycle Code | Active | Pin Count | 48 |
Reach Compliance Code | compliant | ECCN Code | EAR99 |
HTS Code | 8542.39.00.01 | Family | 9512 |
Input Conditioning | DIFFERENTIAL MUX | JESD-30 Code | S-XQCC-N48 |
Logic IC Type | LOW SKEW CLOCK DRIVER | Moisture Sensitivity Level | 3 |
Number of Functions | 1 | Number of Inverted Outputs | |
Number of Terminals | 48 | Number of True Outputs | 5 |
Peak Reflow Temperature (Cel) | 260 | Surface Mount | YES |
Technology | CMOS | Temperature Grade | INDUSTRIAL |
Terminal Finish | MATTE TIN | Terminal Form | NO LEAD |
Terminal Position | QUAD | Time@Peak Reflow Temperature-Max (s) | 30 |
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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.
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