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See Technical Specifications

AU1000-266MCI +BOM

32-BIT, 266MHz, MICROPROCESSOR, PBGA324, 23 X 23 MM, 1 MM PITCH, PLASTIC, MO-192DAJ-1, LFBGA-324

Manufacturer:

BROADCOM INC
Mfr.Part #:

AU1000-266MCI
Datasheet:

AU1000-266MCI Datasheet (PDF)
ECCN (US):

3A991b.1.a.
HTS:

8542.32.00.71
Automotive:

No
PPAP:

No

Key Features

High-density, High-performance, Electrically-erasable Complex Programmable Logic Device
– 64 Macrocells
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
– 44, 68, 84, 100 Pins
– 7.5 ns Maximum Pin-to-pin Delay
– Registered Operation up to 125 MHz
– Enhanced Routing Resources
In-System Programmability (ISP) via JTAG
Flexible Logic Macrocell
– D/T/Latch Configurable Flip-flops
– Global and Individual Register Control Signals
– Global and Individual Output Enable
– Programmable Output Slew Rate
– Programmable Output Open Collector Option
– Maximum Logic Utilization by Burying a Register with a COM Output
Advanced Power Management Features
– Automatic µA Standby for “L” Version
– Pin-controlled 1 mA Standby Mode
– Programmable Pin-keeper Circuits on Inputs and I/Os
– Reduced-power Feature per Macrocell
Available in Commercial and Industrial Temperature Ranges
Available in 44-, 68-, and 84-lead PLCC; 44- and 100-lead TQFP; and 100-lead PQFP
Advanced EE Technology
– 100% Tested
– Completely Reprogrammable
– 10,000 Program/Erase Cycles
– 20-year Data Retention
– 2000V ESD Protection
– 200 mA Latch-up Immunity
JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
PCI-compliant
3.3V or 5.0V I/O Pins
Security Fuse Feature
Green (Pb/Halide-fee/RoHS Compliant) Package Options
Enhanced Features
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
Transparent – Latch Mode
Combinatorial Output with Registered Feedback within Any Macrocell
Three Global Clock Pins
ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
Fast Registered Input from Product Term
Programmable “Pin-keeper” Option
VCC Power-up Reset Option
Pull-up Option on JTAG Pins TMS and TDI
Advanced Power Management Features
– Edge-controlled Power-down “L”
– Individual Macrocell Power Option
– Disable ITD on Global Clocks, Inputs and I/O

Specifications

ECCN (US)	3A991b.1.a.	Part Status	Active
HTS	8542.32.00.71	Automotive	No
PPAP	No	Cell Type	NAND
Chip Density (bit)	8G	Architecture	Non Sectored
Boot Block	No	Address Bus Width (bit)	12
Page Size	2Kbyte	Number of Bits/Word (bit)	8
Number of Words	1G	Programmability	Yes
Timing Type	Asynchronous	Max. Access Time (ns)	25
Maximum Erase Time (S)	0.0035/Block	Maximum Programming Time (ms)	0.006/Page
Interface Type	Parallel	Minimum Operating Supply Voltage (V)	2.7
Typical Operating Supply Voltage (V)	3.3	Maximum Operating Supply Voltage (V)	3.6
Programming Voltage (V)	2.7 to 3.6	Operating Current (mA)	30
Program Current (mA)	30	Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	85	Supplier Temperature Grade	Industrial
Command Compatible	Yes	ECC Support	Yes
Support of Page Mode	Yes	Minimum Endurance (Cycles)	100000
Mounting	Surface Mount	PCB changed	63
Pin Count	63	Lead Shape	Ball