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See Technical Specifications

CY37032P44-125AXC +BOM

CPLD - Complex Programmable Logic Devices 32 Macrocell 5V COM

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Tel: +852 95804164

In-System Reprogrammable™ (ISR™) CMOS CPLDs
— JTAG interface for reconfigurability
— Design changes do not cause pinout changes
— Design changes do not cause timing changes
High density
— 32 to 512 macrocells
— 32 to 264 I/O pins
— Five dedicated inputs including four clock pins
Simple timing model
— No fanout delays
— No expander delays
— No dedicated vs. I/O pin delays
— No additional delay through PIM
— No penalty for using full 16 product terms
— No delay for steering or sharing product terms
3.3V and 5V versions
PCI-compatible[1]
Programmable bus-hold capabilities on all I/Os
Intelligent product term allocator provides:
— 0 to 16 product terms to any macrocell
— Product term steering onan individual basis
— Product term sharing among local macrocells
Flexible clocking
— Four synchronous clocks per device
— Product term clocking
— Clock polarity control per logic block
Consistent package/pinout offering across all densities
— Simplifies design migration
— Same pinout for 3.3V and 5.0V devices
Packages
— 44 to 400 leads in PLCC, CLCC, PQFP, TQFP, CQFP, BGA, and Fine-Pitch BGA packages
— Lead(Pb)-free packages available

Series	Ultra37000™	Programmabe	Verified
Programmable Type	In-System Reprogrammable™ (ISR™) CMOS	Delay Time tpd(1) Max	10 ns
Voltage Supply - Internal	4.75V ~ 5.25V	Number of Macrocells	32
Number of I/O	37	Operating Temperature	0°C ~ 70°C (TA)
Mounting Type	Surface Mount	Base Product Number	CY37032