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See Technical Specifications

DNCE2500GU +BOM

Reliable CPU Connection Ensures Seamless Data Transfe

Manufacturer:

MaxLinear
Mfr.Part #:

DNCE2500GU
Datasheet:

DNCE2500GU Datasheet (PDF)
Shipping Restrictions:

This product may require additional documentation to export from the United States.
Packaging:

[ "Tray" ]
Moisture Sensitive:

Yes
Factory Pack Quantity:

600
EDA/CAD Models:

Request Free CAD Models for DNCE2500GU

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

General
Ports individually configurable
Autonegotiation and management:
— Fast link pulse (FLP) burst generator.
— Arbitration function.
— Accepts preamble suppression.
— Operates up to 12.5 MHz.
Supports the MII station management protocol and frame format (clause 22): basic and extended register set.
Supports next page.
Provides status signals: receive activity, transmit activity, full duplex, collision/jabber, link integrity, and speed indication.
Powerdown mode for 10 Mbits/s and 100 Mbits/s operation.
Loopback testing for 10 Mbits/s and 100 Mbits/s operation.
0.25 µm low-power CMOS technology.
Single 3.3 V power supply operation.
25 MHz XTAL oscillator input or 25 MHz/50 MHz/ 125 MHz clock input.
Compatible with RMII (standard version) and SMII (standard version).
Quad 10 Mbits/s Transceiver
DSP based.
Compatible with IEEE802.3 10Base-T standard for twisted-pair cable.
Half- and full-duplex operations.
Autopolarity detection and correction.
Adjustable squelch level for extended wire-length capability (two levels).
Interfaces with IEEE 802.3u media independent interface (MII) or a serial 10 Mbits/s 7-pin interface.
On-chip filtering eliminates the need for external filters.
Quad 100 Mbits/s Transceiver
Compatible with IEEE 802.3u MII (clause 22), PCS/PMA (clause 24), PMD (clause 25), MII management, and autonegotiation (clause 28) specifications.
Selectable 5-bit code-group (PDT/PDR interface) or 4-bit data nibbles (MII interface) I/O.
Full- or half-duplex operations.
Optional carrier integrity monitor (CIM).
Selectable carrier sense signal generation (MCRS) asserted during either transmission or reception in half duplex (MCRS asserted during reception only in full duplex).
Adaptive equalization and baseline wander correction.
On-chip filtering eliminates the need for external filters.
Quad 100 Mbits/s FX Transceiver
Compatible with IEEE 802.3u 100Base-FX standard.
Reuses existing twisted-pair I/O pins for compatible fiber-optic transceiver pseudo-ECL (PECL) data.
Fiber mode automatically configures port:
— FX mode enable is pin or register selectable
— Disables autonegotiation and 10Base-T.
— Enables 100Base-FX remote fault signaling.
— Disables MLT-3 encoder/decoder.
— Disables scrambler/descrambler.

Specifications

Product Category	CPU - Central Processing Units	Shipping Restrictions	This product may require additional documentation to export from the United States.
Packaging	[ "Tray" ]	Moisture Sensitive	Yes
Product Type	CPU - Central Processing Units	Factory Pack Quantity	600
Subcategory	Embedded Processors & Controllers	Part # Aliases	911451