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EP1C12F324I7N +BOM

130nm Technology

EP1C12F324I7N General Description

In conclusion, the EP1C12F324I7N FPGA device combines high performance, integration, versatility, and energy efficiency in a single package. It is a top choice for applications that demand cutting-edge technology and reliability

Specifications

Part Life Cycle Code Obsolete Reach Compliance Code compliant
ECCN Code 3A991 HTS Code 8542.39.00.01
Clock Frequency-Max 320 MHz JESD-30 Code S-PBGA-B324
JESD-609 Code e1 Length 19 mm
Moisture Sensitivity Level 3 Number of CLBs 1206
Number of Inputs 249 Number of Logic Cells 12060
Number of Outputs 249 Number of Terminals 324
Operating Temperature-Max 100 °C Operating Temperature-Min -40 °C
Organization 1206 CLBS Peak Reflow Temperature (Cel) 245
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 3.5 mm Supply Voltage-Max 1.575 V
Supply Voltage-Min 1.425 V Supply Voltage-Nom 1.5 V
Surface Mount YES Temperature Grade INDUSTRIAL
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu) Terminal Form BALL
Terminal Pitch 1 mm Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 Width 19 mm

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