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Stratix II FPGA
1020-FBGA (33x33)Manufacturer:
Mfr.Part #:
EP2S130F1020C5N
Datasheet:
Part Life Cycle Code:
Obsolete
Reach Compliance Code:
compliant
HTS Code:
8542.39.00.01
Clock Frequency-Max:
640 MHz
EDA/CAD Models:
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The EP2S130F1020C5N FPGA, part of Intel's Stratix II family, is engineered for high-performance applications with its advanced features and rapid processing capabilities. With a logic element capacity of approximately 130,000, this specific model offers powerful programmable logic for complex tasks. Its 1020-pin FineLine Ball Grid Array (FBGA) package ensures reliable and efficient integration, while the "C5N" speed grade signifies its high performance and maximum clock frequency, making it suitable for demanding environments
Part Life Cycle Code | Obsolete | Reach Compliance Code | compliant |
HTS Code | 8542.39.00.01 | Clock Frequency-Max | 640 MHz |
Combinatorial Delay of a CLB-Max | 5.962 ns | JESD-30 Code | S-PBGA-B1020 |
JESD-609 Code | e1 | Length | 33 mm |
Moisture Sensitivity Level | 3 | Number of CLBs | 53016 |
Number of Inputs | 742 | Number of Logic Cells | 132540 |
Number of Outputs | 734 | Number of Terminals | 1020 |
Operating Temperature-Max | 85 °C | Operating Temperature-Min | |
Organization | 53016 CLBS | Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Qualification Status | Not Qualified | Seated Height-Max | 3.5 mm |
Supply Voltage-Max | 1.25 V | Supply Voltage-Min | 1.15 V |
Supply Voltage-Nom | 1.2 V | Surface Mount | YES |
Technology | CMOS | Temperature Grade | OTHER |
Terminal Finish | TIN SILVER COPPER | Terminal Form | BALL |
Terminal Pitch | 1 mm | Terminal Position | BOTTOM |
Width | 33 mm |
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