This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.

Images are for reference only,

See Technical Specifications

EP2S30F484C4N +BOM

Cutting-edge 90nm technology for improved efficiency and speed

Manufacturer:

Intel
Mfr.Part #:

EP2S30F484C4N
Datasheet:

EP2S30F484C4N Datasheet (PDF)
Part Life Cycle Code:

Obsolete
Reach Compliance Code:

compliant
HTS Code:

8542.39.00.01
Clock Frequency-Max:

717 MHz
EDA/CAD Models:

Request Free CAD Models for EP2S30F484C4N

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

EP2S30F484C4N General Description

Engineered with a cutting-edge 90nm process technology, the EP2S30F484C4N FPGA delivers exceptional performance with a maximum operating frequency of 550 MHz. Its 484-ball fine pitch BGA packaging not only enhances thermal efficiency but also optimizes board space utilization in compact designs. Furthermore, the FPGA's support for various communication protocols like PCIe, gigabit Ethernet, and DDR SDRAM opens up a world of connectivity options for system integration and data exchange

Specifications

Part Life Cycle Code	Obsolete	Reach Compliance Code	compliant
HTS Code	8542.39.00.01	Clock Frequency-Max	717 MHz
Combinatorial Delay of a CLB-Max	5.117 ns	JESD-30 Code	S-PBGA-B484
JESD-609 Code	e1	Length	23 mm
Moisture Sensitivity Level	3	Number of CLBs	13552
Number of Inputs	342	Number of Logic Cells	33880
Number of Outputs	334	Number of Terminals	484
Operating Temperature-Max	85 °C	Operating Temperature-Min
Organization	13552 CLBS	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	3.5 mm
Supply Voltage-Max	1.25 V	Supply Voltage-Min	1.15 V
Supply Voltage-Nom	1.2 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	OTHER
Terminal Finish	TIN SILVER COPPER	Terminal Form	BALL
Terminal Pitch	1 mm	Terminal Position	BOTTOM
Width	23 mm