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See Technical Specifications

EP2S30F484I4N +BOM

3880-Cell capacity

Manufacturer:

Intel
Mfr.Part #:

EP2S30F484I4N
Datasheet:

EP2S30F484I4N Datasheet (PDF)
Part Life Cycle Code:

Obsolete
Reach Compliance Code:

compliant
HTS Code:

8542.39.00.01
Clock Frequency-Max:

717 MHz
EDA/CAD Models:

Request Free CAD Models for EP2S30F484I4N

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EP2S30F484I4N General Description

Featuring up to 1.15 million system gates and 1,008 embedded 18 x 18 multipliers, the EP2S30F484I4N is well-equipped to handle high-performance computing tasks. The inclusion of 667 embedded memory blocks further enhances its processing capabilities, making it suitable for a variety of applications

Specifications

Part Life Cycle Code	Obsolete	Reach Compliance Code	compliant
HTS Code	8542.39.00.01	Clock Frequency-Max	717 MHz
Combinatorial Delay of a CLB-Max	5.117 ns	JESD-30 Code	S-PBGA-B484
JESD-609 Code	e1	Length	23 mm
Moisture Sensitivity Level	3	Number of CLBs	1694
Number of Inputs	342	Number of Logic Cells	33880
Number of Outputs	334	Number of Terminals	484
Operating Temperature-Max	100 °C	Operating Temperature-Min	-40 °C
Organization	1694 CLBS	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	3.5 mm
Supply Voltage-Max	1.25 V	Supply Voltage-Min	1.15 V
Supply Voltage-Nom	1.2 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	TIN SILVER COPPER	Terminal Form	BALL
Terminal Pitch	1 mm	Terminal Position	BOTTOM
Width	23 mm