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EP3C10E144C8 +BOM

Programmable gate array

EP3C10E144C8 General Description

Operating at a core voltage of 1.2V, the EP3C10E144C8 supports a wide range of I/O standards, including LVCMOS, LVTTL, and SSTL, making it compatible with different interfacing requirements. The FPGA offers flexible configuration options, such as JTAG and AS mode configuration, catering to diverse application needs. With a maximum operating frequency of 250MHz and up to 51 I/O pins, this device delivers reliable performance for a range of tasks

Specifications

Part Life Cycle Code Active Reach Compliance Code compliant
HTS Code 8542.39.00.01 Clock Frequency-Max 472.5 MHz
JESD-30 Code S-PQFP-G144 JESD-609 Code e0
Length 20 mm Moisture Sensitivity Level 3
Number of CLBs 10320 Number of Inputs 94
Number of Logic Cells 10320 Number of Outputs 94
Number of Terminals 144 Operating Temperature-Max 85 °C
Operating Temperature-Min Organization 10320 CLBS
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 1.65 mm Supply Voltage-Max 1.25 V
Supply Voltage-Min 1.15 V Supply Voltage-Nom 1.2 V
Surface Mount YES Technology CMOS
Temperature Grade OTHER Terminal Finish TIN LEAD
Terminal Form GULL WING Terminal Pitch 0.4 mm
Terminal Position QUAD Width 20 mm

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