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See Technical Specifications

EP3C55F484C6N +BOM

Utilizes 65nm technology with a maximum operating frequency of 500MHz

Manufacturer:

Intel
Mfr.Part #:

EP3C55F484C6N
Datasheet:

EP3C55F484C6N Datasheet (PDF)
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
HTS Code:

8542.39.00.01
Clock Frequency-Max:

472.5 MHz
EDA/CAD Models:

Request Free CAD Models for EP3C55F484C6N

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EP3C55F484C6N General Description

Meet the EP3C55F484C6N FPGA from Altera, now a part of Intel, representing the Cyclone III family. With an impressive 55,000 logic elements, this FPGA offers a compelling mix of performance and economic efficiency. Its 484-pin configuration in a neat 23x23mm package caters to space-constrained designs. Featuring 6,080 Kbits of embedded memory, 211 multipliers, and dedicated PLLs for clock management, this FPGA is a versatile choice for various applications. Supporting multiple I/O standards and offering advanced features like built-in self-test capabilities and configurable interfaces, the EP3C55F484C6N is a valuable asset in the world of digital design

Specifications

Part Life Cycle Code	Active	Reach Compliance Code	compliant
HTS Code	8542.39.00.01	Clock Frequency-Max	472.5 MHz
JESD-30 Code	R-PBGA-B484	JESD-609 Code	e1
Length	23 mm	Moisture Sensitivity Level	3
Number of CLBs	55856	Number of Inputs	327
Number of Logic Cells	55856	Number of Outputs	327
Number of Terminals	484	Operating Temperature-Max	85 °C
Operating Temperature-Min		Organization	55856 CLBS
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	2.6 mm	Supply Voltage-Max	1.25 V
Supply Voltage-Min	1.15 V	Supply Voltage-Nom	1.2 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	OTHER	Terminal Finish	TIN SILVER COPPER
Terminal Form	BALL	Terminal Pitch	1 mm
Terminal Position	BOTTOM	Width	23 mm