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CPLD - Complex Programmable Logic Devices CPLD - MAX 3000A 128 Macro 80 IOs
TQFP-100Manufacturer:
Mfr.Part #:
EPM3128ATI100-10N
Datasheet:
Part Life Cycle Code:
Obsolete
Reach Compliance Code:
compliant
ECCN Code:
EAR99
HTS Code:
8542.39.00.01
EDA/CAD Models:
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The EPM3128ATI100-10N from Altera (now Intel) stands out as a versatile Programmable Logic Device. With its generous offering of 128 macrocells and a maximum of 128 product terms per macrocell, this PLD provides users with ample room for complex logic designs. The inclusion of a Thin Quad Flat Pack (TQFP) package ensures a compact and practical form factor. Operating at a maximum frequency of 100 MHz, this device is well-suited for tasks requiring swift data processing. The industrial-grade temperature range of -10 guarantees reliable performance even in demanding environments. Designed for standard voltage levels, the EPM3128ATI100-10N is a dependable choice for various applications. Its nomenclature ending in "N" signifies a no-frills, standard version, perfect for straightforward implementations
Part Life Cycle Code | Obsolete | Reach Compliance Code | compliant |
ECCN Code | EAR99 | HTS Code | 8542.39.00.01 |
Additional Feature | YES | Clock Frequency-Max | 98 MHz |
In-System Programmable | YES | JESD-30 Code | S-PQFP-G100 |
JESD-609 Code | e3 | JTAG BST | YES |
Length | 14 mm | Number of Dedicated Inputs | |
Number of I/O Lines | 80 | Number of Macro Cells | 128 |
Number of Terminals | 100 | Operating Temperature-Max | 85 °C |
Operating Temperature-Min | -40 °C | Organization | 0 DEDICATED INPUTS, 80 I/O |
Output Function | MACROCELL | Programmable Logic Type | EE PLD |
Propagation Delay | 10 ns | Qualification Status | Not Qualified |
Seated Height-Max | 1.27 mm | Supply Voltage-Max | 3.6 V |
Supply Voltage-Min | 3 V | Supply Voltage-Nom | 3.3 V |
Surface Mount | YES | Technology | CMOS |
Temperature Grade | INDUSTRIAL | Terminal Finish | MATTE TIN |
Terminal Form | GULL WING | Terminal Pitch | 0.5 mm |
Terminal Position | QUAD | Width | 14 mm |
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