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See Technical Specifications

EPM7064STC100-5N +BOM

EPM7064STC100-5N CPLD featuring 64 macros and 68 IOs

Manufacturer:

Intel Corp
Mfr.Part #:

EPM7064STC100-5N
Datasheet:

EPM7064STC100-5N Datasheet (PDF)
Feature-family-name:

MAX® 7000S
Feature-program-memory-type:

EEPROM
Feature-number-of-logic-blocks-elements:

4
Feature-number-of-macro-cells:

64
EDA/CAD Models:

Request Free CAD Models for EPM7064STC100-5N

EPM7064STC100-5N General Description

The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest

Specifications

feature-family-name	MAX® 7000S	feature-device-logic-cells
feature-program-memory-type	EEPROM	feature-memory-size-kbit
feature-ram-bits-kbit		feature-number-of-logic-blocks-elements	4
feature-number-of-macro-cells	64	feature-number-of-product-terms-per-macro	32
feature-process-technology		feature-device-system-gates	1250
feature-number-of-user-i-os	68	feature-number-of-flip-flops
feature-programmability	Yes	feature-programmable-type
feature-maximum-internal-frequency-mhz	250	feature-speed-grade	5
feature-in-system-programmability	Yes	feature-minimum-operating-supply-voltage-v	4.75
feature-maximum-operating-supply-voltage-v	5.25	feature-packaging	Tray
feature-rad-hard		feature-pin-count	100
feature-cecc-qualified	No	feature-esd-protection
feature-military	No	feature-aec-qualified	No
feature-aec-qualified-number		feature-auto-motive	No
feature-p-pap	No	feature-eccn-code	EAR99
feature-svhc	No	feature-svhc-exceeds-threshold	No