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See Technical Specifications

H28S7Q302BMR +BOM

Manufacturer:

SKHYNIX
Mfr.Part #:

H28S7Q302BMR
Datasheet:

H28S7Q302BMR Datasheet (PDF)
Package/Case:

BGA
Product Type:

Interface ICs
EDA/CAD Models:

Request Free CAD Models for H28S7Q302BMR

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H28S7Q302BMR General Description

DESCRIPTIONThe MH28S72PJG is 134,217,728 - word x 72-bit Sy nchronous DRAM stacked structural module. This consist of thirty -six industry standard 64M x 4 Sy nchronous DRAMs in TSOP.The stacked structure of TSOP on a card edge dual inline package prov ides any application where high densities and large of quantities memory are required.This is a socket-ty pe memory module ,suitable f or easy interchange or addition of module.FEATURES• Utilizes industry standard 64M X 4 Synchronous DRAMs in TSOP package , industry standard Resister in TSSOP package , and industrystandard PLL in TSSOP package.• Single 3.3V +/- 0.3V supply• Burst length 1/2/4/8/Full Page (programmable)• Burst type sequential / interleave (programmable)• Column access random• Burst W rite / Single W rite (programmable)• Auto precharge / Auto bank precharge controlled by A10• Auto refresh and Self refresh• LVTTL Interface• 8192 refresh cycles every 64msAPPLICATION Main memoryunit for computers, Microcomputer memory.

Key Features

Utilizes industry standard 64M X 4 Synchronous DRAMs in TSOP package , industry standard Resister in TSSOP package , and industrystandard PLL in TSSOP package.
Single 3.3V +/- 0.3V supply
Burst length 1/2/4/8/Full Page (programmable)
Burst type sequential / interleave (programmable)
Column access random
Burst W rite / Single W rite (programmable)
Auto precharge / Auto bank precharge controlled by A10
Auto refresh and Self refresh
LVTTL Interface
8192 refresh cycles every 64ms