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See Technical Specifications

KS8995X +BOM

PQFP128 package

Manufacturer:

MICROCHIP
Mfr.Part #:

KS8995X
Datasheet:

KS8995X Datasheet (PDF)
Part Life Cycle Code:

Obsolete
Pin Count:

128
Reach Compliance Code:

compliant
HTS Code:

8542.39.00.01
EDA/CAD Models:

Request Free CAD Models for KS8995X

Email: [email protected]

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Tel: +852 95804164

KS8995X General Description

From its rugged design to its advanced features and energy-efficient operation, the KS8995X is the go-to choice for industrial Ethernet applications. With its ability to thrive in extreme temperatures, support for advanced networking features, and low power consumption, this 5-port Fast Ethernet switch delivers the reliability and performance that industrial networks demand. Whether you are upgrading an existing network or deploying a new industrial application, the KS8995X from Micrel is the ideal solution for your networking needs

Key Features

Integrated switch with five MACs and five Fast Ethernet transceivers fully compliant to IEEE 802.3u standard
Shared memory based switch fabric with fully nonblocking configuration
10BaseT, 100BaseTX and 100BaseFX modes (FX in Ports 4 and 5)
Dual MII configuration: MII-Switch (MAC or PHY mode MII) and MII-P5 (PHY mode MII)
VLAN ID tag/untag options, per-port basis
Enable/disable option for huge frame size up to 1916 bytes per frame
Broadcast storm protection with percent control – global and per-port basis
Optimization for fiber-to-copper media conversion
Full-chip hardware power-down support (register configuration not saved)
Per-port-based software power-save on PHY (idle link detection, register configuration preserved)
QoS/CoS packets prioritization supports: per port, 802.1p and DiffServ based
802.1p/q tag insertion or removal on a per-port basis (egress)
Port-based VLAN support
MDC and MDI/O interface support to access the MII PHY control registers (not all control registers)
MII local loopback support
On-chip 64Kbyte memory for frame buffering (not shared with 1K unicast address table)
1.4Gbps high-performance memory bandwidth
Wire-speed reception and transmission
Integrated look-up engine with dedicated 1K unicast MAC addresses
Automatic address learning, address aging and address migration
Full-duplex IEEE 802.3x and half-duplex back pressure flow control
Comprehensive LED support
7-wire SNI support for legacy MAC interface
Automatic MDI/MDI-X crossover for plug-and-play
Disable automatic MDI/MDIX option
Low power Core: 1.8V I/O: 2.5 or 3.3V
0.18µm CMOS technology
Commercial temperature range: 0°C to +70°C
Available in 128-pin PQFP package

Specifications

Source Content uid	KS8995X	Part Life Cycle Code	Obsolete
Pin Count	128	Reach Compliance Code	compliant
HTS Code	8542.39.00.01	JESD-30 Code	R-PQFP-G128
JESD-609 Code	e0	Length	20 mm
Moisture Sensitivity Level	3	Number of Functions	1
Number of Terminals	128	Operating Temperature-Max	70 °C
Operating Temperature-Min		Peak Reflow Temperature (Cel)	240
Qualification Status	Not Qualified	Seated Height-Max	3.4 mm
Supply Current-Max	375 mA	Supply Voltage-Nom	1.8 V
Surface Mount	YES	Technology	CMOS
Telecom IC Type	ETHERNET SWITCH	Temperature Grade	COMMERCIAL
Terminal Finish	TIN LEAD	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	30	Width	14 mm