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See Technical Specifications

LCK4953 +BOM

PLL Clock Driver Single-Element 32-Pin TQFP Tray

Manufacturer:

Broadcom Corporation
Mfr.Part #:

LCK4953
Datasheet:

LCK4953 Datasheet (PDF)
Launch_date:

Apr 1, 1992
Last_inspection_date:

19 APR 2023
Supplier_cage_code:

50434
Htsusa:

8542390001
EDA/CAD Models:

Request Free CAD Models for LCK4953

LCK4953 General Description

The LCK4953 is a PLL-based clock driver deviceintended for high-performance clock tree designs.The LCK4953 is 3.3 V compatible with outputfrequencies of up to 130 MHz and output skews of75 ps. The LCK4953 can meet the most demandingtiming requirements and employs on-chip voltageregulators to minimize cycle-to-cycle jitter and phasejitter.The LCK4953 is ideal for use as a zero delay, lowskew, fan-out buffer due to its differential LVPECLreference input along with an external feedbackinput. The MROEB pin of the LCK4953, when drivenhigh, will reset the internal counters and 3-state theoutput buffers. The LCK4953 has been optimized forzero delay performance.The LCK4953 is fully 3.3 V compatible and requiresno external loop filter components. All control inputsaccept LVCMOS or LVTTL compatible levels whilethe outputs provide LVCMOS levels with the ability todrive terminated 50 Ω transmission lines. For seriesterminated50 Ω lines, each of the LCK4953 outputscan drive two traces giving the device an effectivefan-out of 1:18. For the optimum combination ofboard density and performance, the device ispackaged in a 7 mm × 7 mm 32-lead TQFP package.The L-LCK4953 is a lead-free device.

Specifications

place		launch_date	Apr 1, 1992
last_inspection_date	19 APR 2023	supplier_cage_code	50434
htsusa	8542390001	schedule_b	8542390000
ppap	False	aec