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LS1012ASE7EKA +BOM

Layerscape 64-bit Arm Cortex-A53, Single-core, 600MHz, 0 to 105C, Security enabled

LS1012ASE7EKA General Description

Microprocessors - MPU Layerscape 64-bit Arm Cortex-A53, Single-core, 600MHz, 0 to 105C, Security enabled

NXP Semiconductor Inventory

Key Features

Layerscape 64-bit Arm Cortex-A53, Single-core, 600MHz, 0 to 105C, Security enabled
NXP Semiconductor Original Stock

Application

  • Communication Infrastructure
  • Industrial
  • Smart City
  • Smart Home
NXP Semiconductor Inventory

Specifications

Silicon Rev Rev 1 Family QorIQ LS1012A
Qualification tier Industrial UART 10
LS1012A Block Diagram

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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

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LS1012ASE7EKA Datasheet PDF

Preliminary Specification LS1012ASE7EKA PDF Download

LS1012ASE7EKA PDF Preview

In Stock: 4,593

Minimum Order: 1

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