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LTC4307IMS8-1 +BOM

I2C Buffer 2.5V/3.3V 8-Pin MSOP

LTC4307IMS8-1 General Description

The LTC4307 hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4307 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOL tolerance allows multiple devices to be cascaded on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms, the LTC4307 will automatically break the bus connection. At this time the LTC4307 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will resume if the stuck bus is cleared.

During insertion, the SDA and SCL lines are pre-charged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4307 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open-drain output which indicates that the backplane and card sides are connected.

Analog Devices, Inc Inventory

Key Features

  • Bidirectional Buffer with Stuck Bus Recovery
  • 60mV Buffer Offset Independent of Load
  • 30ms Stuck Bus Timeout
  • Compatible with Non-Compliant VOL I2C Devices
  • Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane
  • Isolates Input SDA and SCL Line from Output
  • Compatible with I2C™, I2C Fast Mode and SMBus
  • READY Open-Drain Output
  • 1V Precharge on All SDA and SCL Lines
  • High Impedance SDA, SCL Pins for VCC = 0V
  • Small 8-Lead (3mm × 3mm) DFN and 8-Lead MSOP Packages
Analog Devices, Inc Original Stock

Application

  • Live Board Insertion
  • Servers
  • Capacitance Buffer/Bus Extender
  • RAID Systems
  • ATCA
Analog Devices, Inc Inventory

Specifications

place Malaysia launch_date Jul 2, 2007
last_inspection_date 07 APR 2023 supplier_cage_code 24355
htsusa 8542390001 schedule_b 8542390000
ppap False aec False

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