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See Technical Specifications

MT29F2G08ABAEAH4-IT +BOM

Single-Level Cell NAND Flash

Manufacturer:

MICRON
Mfr.Part #:

MT29F2G08ABAEAH4-IT
Datasheet:

MT29F2G08ABAEAH4-IT Datasheet (PDF)
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
ECCN Code:

EAR99
HTS Code:

8542.32.00.51
EDA/CAD Models:

Request Free CAD Models for MT29F2G08ABAEAH4-IT

Key Features

Open NAND Flash Interface (ONFI) 2.2-compliant1
Multiple-level cell (MLC) technology
Organization
– Page size x8: 8640 bytes (8192 + 448 bytes)
– Block size: 256 pages (2048K + 112K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 64Gb: 4096 blocks;
128Gb: 8192 blocks;
256Gb: 16,384 blocks;
512Gb: 32,786 blocks
Synchronous I/O performance
– Up to synchronous timing mode 5
– Clock rate: 10ns (DDR)
– Read/write throughput per pin: 200 MT/s
Asynchronous I/O performance
– Up to asynchronous timing mode 5
tRC/tWC: 20ns (MIN)
Array performance
– Read page: 50µs (MAX)
– Program page: 1300µs (TYP)
– Erase block: 3ms (TYP)
Operating Voltage Range
– VCC: 2.7–3.6V
– VCCQ: 1.7–1.95V, 2.7–3.6V
Command set: ONFI NAND Flash Protocol
Advanced Command Set
– Program cache
– Read cache sequential
– Read cache random
– One-time programmable (OTP) mode
– Multi-plane commands
– Multi-LUN operations
– Read unique ID
– Copyback
First block (block address 00h) is valid when shipped
from factory. For minimum required ECC, see
Error Management (page 109).
RESET (FFh) required as first command after power
Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
Data strobe (DQS) signals provide a hardware method
for synchronizing data DQ in the synchronous
interface
Copyback operations supported within the plane
from which data is read
Quality and reliability
– Data retention: 10 years
– Endurance: 5000 PROGRAM/ERASE cycles
Operating temperature:
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
Package
– 52-pad LGA
– 48-pin TSOP
– 100-ball BGA

Specifications

Part Life Cycle Code	Active	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.32.00.51
Access Time-Max	20 ns	Command User Interface	YES
JESD-30 Code	R-PBGA-B63	Length	11 mm
Memory Density	2147483648 bit	Memory IC Type	FLASH
Memory Width	8	Number of Functions	1
Number of Sectors/Size	2K	Number of Terminals	63
Number of Words	268435456 words	Number of Words Code	256000000
Operating Mode	ASYNCHRONOUS	Operating Temperature-Max	85 °C
Operating Temperature-Min	-40 °C	Organization	256MX8
Page Size	2K words	Parallel/Serial	PARALLEL
Peak Reflow Temperature (Cel)	NOT SPECIFIED	Programming Voltage	3.3 V
Ready/Busy	YES	Seated Height-Max	1.25 mm
Sector Size	128K	Standby Current-Max	0.0001 A
Supply Current-Max	0.035 mA	Supply Voltage-Max (Vsup)	3.6 V
Supply Voltage-Min (Vsup)	2.7 V	Supply Voltage-Nom (Vsup)	3.3 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	INDUSTRIAL	Terminal Form	BALL
Terminal Pitch	0.8 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED	Type	SLC NAND TYPE
Width	9 mm