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PSD813F2A-90J +BOM

Featuring 3K gates and a 52-pin PLCC package, the PSD813F2A-90J is a high-performance CPLD suitable for diverse circuit design needs

Manufacturer:

STMicroelectronics
Mfr.Part #:

PSD813F2A-90J
Datasheet:

PSD813F2A-90J Datasheet (PDF)
Maximum Operating Frequency:

43.48 MHz
Operating Supply Voltage:

5 V
Minimum Operating Temperature:

0 C
Maximum Operating Temperature:

+ 70 C
EDA/CAD Models:

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PSD813F2A-90J General Description

The PSD813F2A-90J is a versatile and feature-rich system management IC, perfect for addressing the power supply sequencing and monitoring needs of modern digital systems. With its two independent voltage monitoring channels, configurable power-up and power-down sequencing, and wide operating voltage range, it offers a comprehensive solution for ensuring stable and reliable power delivery in a variety of applications. Its programmable undervoltage and overvoltage thresholds, along with the watchdog timer, provide the flexibility and adaptability necessary for effective system monitoring

Key Features

Flash in-system programmable (ISP)
peripheral for 8-bit MCUs
Dual bank Flash memories
– Up to 2 Mbit of primary Flash memory (8
uniform sectors, 32K x8)
– Up to 256 Kbit secondary Flash memory (4
uniform sectors)
– Concurrent operation: read from one
memory while erasing and writing the other
Up to 256 Kbit SRAM
27 reconfigurable I/Oports
Enhanced JTAG serial port
PLD with macrocells
– Over 3000 gates of PLD: CPLD and DPLD
– CPLD with 16 output macrocells (OMCs)
and 24 input macrocells (IMCs)
– DPLD - user defined internal chip select
decoding
27 individually configurable I/O port pins
They can be used for the following functions:
– MCU I/Os
– PLD I/Os
– Latched MCU address output
– Special function I/Os.
– 16 of the I/O ports may be configured as
open-drain outputs.
In-system programming (ISP) with JTAG
– Built-in JTAG compliant serial port allows
full-chip in-system programmability
– Efficient manufacturing allow easy product
testing and programming
– Use low cost FlashLINK cable with PC
Page register
– Internal page register that can be used to
expand the microcontroller address space
by a factor of 256
Programmable power management
Packages are ECOPACK®

Specifications

Product Category	FPGA - Configuration Memory	Maximum Operating Frequency	43.48 MHz
Operating Supply Voltage	5 V	Minimum Operating Temperature	0 C
Maximum Operating Temperature	+ 70 C	Mounting Style	SMD/SMT
Moisture Sensitive	Yes	Product Type	FPGA - Configuration Memory
Series	PSD813F2	Factory Pack Quantity	500
Subcategory	Programmable Logic ICs	Supply Voltage - Max	5.5 V
Supply Voltage - Min	4.5 V	Unit Weight	0.104503 oz