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See Technical Specifications

S3C2510A01L +BOM

Manufacturer:

SAMSUNG
Mfr.Part #:

S3C2510A01L
Datasheet:

S3C2510A01L Datasheet (PDF)
Package/Case:

BGA
Product Type:

Interface ICs
EDA/CAD Models:

Request Free CAD Models for S3C2510A01L

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S3C2510A01L General Description

PRODUCT OVERVIEWINTRODUCTIONSAMSUNGs S3C2400 16/32-bit RISC microprocessor is designed to provide a cost-effective, low power, small die size and high performance micro-controller solution for hand-held devices and general applications. To reduce total system cost, S3C2400 also provides the following: separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD controller (STN & TFT), 2-channel UART with handshake, 4-channel DMA, System Manager (chip select logic, EDO/SDRAM controller), 4-channel Timers with PWM, I/O Ports, RTC, 8-channel 10-bit ADC, IIC-BUS interface, IIS-BUS interface, USB Host, USB Device, Multi-Media Card Interface, SPI and PLL for clock generation.The S3C2400 was developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for cost-sensitive and power sensitive applications. Also S3C2400 adopts a new bus architecture, AMBA (Advanced Microcontroller Bus Architecture) An outstanding feature of the S3C2400 is its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with a 8-word line length.By providing complete set of common system peripherals, the S3C2400 minimizes overall system costs and eliminates the need to configure additional components. The integrated on-chip functions that are described in this document include:• 1.8V internal, 3.3V external (I/O boundary) microprocessor with 16KB I-Cache, 16KB D-Cache, and MMU.• External memory controller. (EDO/SDRAM Control, Chip Select logic)• LCD controller (up to 4K color STN and 64K color TFT) with 1-ch LCD-dedicated DMA.• 4-ch DMAs with external request pins• 2-ch UART with handshake (IrDA1.0, 16-byte FIFO)/1-ch SPI• 1-ch multi-master IIC-BUS/1-ch IIS-BUS controller• MMC interface (ver 2.11)• 2-port USB Host /1- port USB Device (ver 1.1)• 4-ch PWM timers & 1-ch internal timer• Watch Dog Timer• 90-bit general purpose I/O ports/8-ch external interrupt source• Power control: Normal, Slow, Idle, Stop and SL_IDLE mode• 8-ch 10-bit ADC.• RTC with calendar function.• On-chip clock generator with PLL