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SC26C92A1B +BOM

Reliable, low-power IC for , two-channel UART interface implementatio

Manufacturer:

PHILIPS SEMICONDUCTORS
Mfr.Part #:

SC26C92A1B
Datasheet:

SC26C92A1B Datasheet (PDF)
Part Life Cycle Code:

Transferred
HTS Code:

8542.31.00.01
JESD-30 Code:

S-PQFP-G44
JESD-609 Code:

e0
EDA/CAD Models:

Request Free CAD Models for SC26C92A1B

SC26C92A1B General Description

The SC26C92A1B is a highly adaptable dual universal asynchronous receiver/transmitter (DUART) chip designed for use in a wide range of embedded systems. This versatile chip boasts two independent channels, each with programmable baud rates, data formats, and interrupt capabilities, allowing for flexible and customizable serial communication. Its advanced functionality makes it a popular choice for industrial control systems, telecommunications equipment, and various other applications that require reliable and efficient serial communication

Key Features

Dual full-duplex independent asynchronous receiver/transmitters
8 character FIFOs for each receiver and transmitter
Programmable data format
– 5 to 8 data bits plus parity
– Odd, even, no parity or force parity
– 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
16-bit programmable Counter/Timer
Programmable baud rate for each receiver and transmitter selectable from:
– 27 fixed rates: 50 to 230.4k baud
– Other baud rates to 230.4k baud at 16X
– Programmable user-defined rates derived from a programmable counter/timer
– External 1X or 16X clock
Parity, framing, and overrun error detection
False start bit detection
Line break detection and generation
Programmable channel mode
– Normal (full-duplex)
– Automatic echo
– Local loopback
– Remote loopback
– Multidrop mode (also called ‘wake-up’ or ‘9-bit’)
Multi-function 7-bit input port
– Can serve as clock, modem, or control inputs
– Change of state detection on four inputs
– Inputs have typically>100k pull-up resistors
Multi-function 8-bit output port
– Individual bit set/reset capability
– Outputs can be programmed to be status/interrupt signals
– FIFO states for DMA and modem interface
Versatile interrupt system
– Single interrupt output with eight maskable interrupting conditions
– Output port can be configured to provide a total of up to six separate wire-ORable interrupt outputs
– Each FIFO can be programmed for four different interrupt levels
– Watch dog timer for each receiver
Maximum data transfer rates: 1X – 1Mb/sec, 16X – 1Mb/sec
Automatic wake-up mode for multidrop applications
Start-end break interrupt/status
Detects break which originates in the middle of a character
On-chip crystal oscillator
Power down mode
Receiver timeout mode
Single +5V power supply
Powers up to emulate SCC2692

Specifications

Part Life Cycle Code	Transferred	Reach Compliance Code
HTS Code	8542.31.00.01	JESD-30 Code	S-PQFP-G44
JESD-609 Code	e0	Number of Terminals	44
Operating Temperature-Max	85 °C	Operating Temperature-Min	-40 °C
Power Supplies	5 V	Qualification Status	Not Qualified
Supply Voltage-Nom	5 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	Tin/Lead (Sn/Pb)	Terminal Form	GULL WING
Terminal Pitch	0.8 mm	Terminal Position	QUAD
uPs/uCs/Peripheral ICs Type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL