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See Technical Specifications

SM320C6678ACYPW +BOM

High reliability product high performance 8-core C6678 fixed and floating-point DSP

Manufacturer:

TI
Mfr.Part #:

SM320C6678ACYPW
Datasheet:

SM320C6678ACYPW Datasheet (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
ECCN Code:

5A991.B.4.A
EDA/CAD Models:

Request Free CAD Models for SM320C6678ACYPW

Email: [email protected]

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SM320C6678ACYPW General Description

The SM320C6678 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with eight C66x CorePac DSPs, each core runs at 1.0 GHz enabling up to 8 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6678 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

Key Features

Eight SM320C66x DSP Core Subsystems at 1.00 GHz
- 32KB L1P, 32KB L1D, 512KB L2 Per Core
- 4MB Shared L2
Multicore Navigator and TeraNet Switch Fabric - 2 Tb
Network Coprocessors- Packet Accelerator, Security Accelerator
Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
HyperLink - Up to 50Gbaud Operation at -40C to 105C and 25 GBaud at -55C to 115C, Full Duplex
Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
UART Interface
I2C Interface
16 GPIO Pins
SPI Interface
Sixteen 64-Bit Timers
Three On-Chip PLLs

Specifications

Source Content uid	SM320C6678ACYPW	Pbfree Code	Yes
Part Life Cycle Code	Active	Reach Compliance Code	compliant
ECCN Code	5A991.B.4.A	HTS Code	8542.31.00.01
Address Bus Width	24	Barrel Shifter	NO
Boundary Scan	YES	Clock Frequency-Max	312.5 MHz
External Data Bus Width	16	Format	FLOATING POINT
Integrated Cache	YES	Internal Bus Architecture	SINGLE
JESD-30 Code	S-PBGA-B841	JESD-609 Code	e1
Length	24 mm	Low Power Mode	YES
Moisture Sensitivity Level	4	Number of DMA Channels	80
Number of Terminals	841	Number of Timers	16
Operating Temperature-Max	115 °C	Operating Temperature-Min	-55 °C
Peak Reflow Temperature (Cel)	245	Seated Height-Max	3.39 mm
Supply Voltage-Max	1.05 V	Supply Voltage-Min	0.95 V
Supply Voltage-Nom	1 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	OTHER
Terminal Finish	Tin/Silver/Copper (Sn/Ag/Cu)	Terminal Form	BALL
Terminal Pitch	0.8 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED	Width	24 mm
uPs/uCs/Peripheral ICs Type	DIGITAL SIGNAL PROCESSOR, MIXED