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SN74LV595APWR +BOM
8 2V~5.5V 1 Serial to serial or parallel TSSOP-16 Shifting Register ROHS
TSSOP (PW)-16-
Manufacturer:
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Mfr.Part #:
SN74LV595APWR
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Datasheet:
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Configuration:
Serial-in, Parallel-out
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Bits (#):
8
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Technology Family:
LV-A
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Supply Voltage (min) (V):
2
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EDA/CAD Models:
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SN74LV595APWR General Description
With positive-edge triggered shift register clock (SRCLK) and storage register clock (RCLK), the SN74LV595A offers precise control over the timing and coordination of data transfer processes. This ensures reliable operation and seamless integration with other circuitry, enhancing overall system performance
Key Features
- V CC operation of 2 V to 5.5 V
- Maximum t pd of 7.1 ns at 5 V
- Typical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
- Typical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
- Support mixed-mode voltage operation on all ports
- 8-bit serial-in, parallel-out shift
- I off supports live insertion, partial power-down mode, and back-drive protection
- Shift register has direct clear
- Latch-up performance exceeds 250 mA per JESD 17
Specifications
Configuration | Serial-in, Parallel-out | Bits (#) | 8 |
Technology family | LV-A | Supply voltage (min) (V) | 2 |
Supply voltage (max) (V) | 5.5 | Input type | Standard CMOS |
Output type | 3-State | Clock frequency (MHz) | 95 |
IOL (max) (mA) | 16 | IOH (max) (mA) | -16 |
Supply current (max) (µA) | 20 | Features | Balanced outputs, Output register, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Operating temperature range (°C) | -40 to 125 | Rating | Catalog |
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