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See Technical Specifications

TPS51200DRCT +BOM

DDR Termination Regulator 2.375V to 3.5V 10-Pin VSON EP T/R

Manufacturer:

TI
Mfr.Part #:

TPS51200DRCT
Datasheet:

TPS51200DRCT Datasheet (PDF)
Vin (min) (V):

1.1
Vin (max) (V):

3.5
Rating:

Catalog
Iq (typ) (mA):

0.5
EDA/CAD Models:

Request Free CAD Models for TPS51200DRCT

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TPS51200DRCT General Description

The TPS51200 device is a sink and source double data rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.

The TPS51200 maintains a fast transient response and requires a minimum output capacitance of only 20 µF. The TPS51200 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low-Power DDR3 and DDR4 VTT bus termination.

In addition, the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The TPS51200 is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.

Key Features

Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
VLDOIN Voltage Range: 1.1 V to 3.5 V
Sink and Source Termination Regulator Includes Droop Compensation
Requires Minimum Output Capacitance of 20-µF (Typically 3 × 10-µF MLCCs) for Memory Termination Applications (DDR)
PGOOD to Monitor Output Regulation
EN Input
REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
Remote Sensing (VOSNS)
±10-mA Buffered Reference (REFOUT)
Built-in Soft Start, UVLO, and OCL
Thermal Shutdown
Supports DDR, DDR2, DDR3, DDR3L, Low-Power DDR3, and DDR4 VTT Applications
10-Pin VSON Package With Thermal Pad