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See Technical Specifications

XC2VP50-6FF1152I +BOM

Powerful XC2VP50-6FF1152I FPGA with 16 Rocket IOs

Manufacturer:

XILINX
Mfr.Part #:

XC2VP50-6FF1152I
Datasheet:

XC2VP50-6FF1152I Datasheet (PDF)
Pbfree Code:

No
Part Life Cycle Code:

Obsolete
Pin Count:

1152
Reach Compliance Code:

not_compliant
EDA/CAD Models:

Request Free CAD Models for XC2VP50-6FF1152I

XC2VP50-6FF1152I General Description

The XC2VP50-6FF1152I FPGA by Xilinx stands out as a top-performing member of the Virtex-II Pro family. With 1152 slices and a 6-speed grade, it offers engineers ample resources for implementing complex digital circuits in a wide range of applications. The flip-chip (FF) package type ensures secure and reliable mounting, making it a go-to choice for demanding industrial environments

Specifications

Pbfree Code	No	Part Life Cycle Code	Obsolete
Pin Count	1152	Reach Compliance Code	not_compliant
ECCN Code	3A991.D	HTS Code	8542.39.00.01
Clock Frequency-Max	1200 MHz	Combinatorial Delay of a CLB-Max	0.32 ns
JESD-30 Code	S-PBGA-B1152	JESD-609 Code	e0
Length	35 mm	Moisture Sensitivity Level	4
Number of CLBs	5904	Number of Inputs	692
Number of Logic Cells	53136	Number of Outputs	644
Number of Terminals	1152	Organization	5904 CLBS
Peak Reflow Temperature (Cel)	225	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	3.4 mm
Supply Voltage-Max	1.575 V	Supply Voltage-Min	1.425 V
Supply Voltage-Nom	1.5 V	Surface Mount	YES
Technology	CMOS	Terminal Finish	Tin/Lead (Sn63Pb37)
Terminal Form	BALL	Terminal Pitch	1 mm
Terminal Position	BOTTOM	Time@Peak Reflow Temperature-Max (s)	30
Width	35 mm