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See Technical Specifications

XC5202-6PQ100C +BOM

83MHz, 64-Cell CMOS Technology

Manufacturer:

XILINX
Mfr.Part #:

XC5202-6PQ100C
Datasheet:

XC5202-6PQ100C Datasheet (PDF)
Pbfree Code:

No
Part Life Cycle Code:

Obsolete
Pin Count:

100
Reach Compliance Code:

not_compliant
EDA/CAD Models:

Request Free CAD Models for XC5202-6PQ100C

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XC5202-6PQ100C General Description

The XC5202-6PQ100C also boasts a range of features that further enhance its functionality, including 8 differential clock inputs, 6 digital clock managers, and 4 global clock multiplexers. Additionally, it supports JTAG boundary scan testing, on-chip oscillator, power-on reset circuitry, and user-selectable I/O standards, offering flexibility and ease of use

Specifications

Pbfree Code	No	Part Life Cycle Code	Obsolete
Pin Count	100	Reach Compliance Code	not_compliant
HTS Code	8542.39.00.01	Additional Feature	MAX AVAILABLE 3000 LOGIC GATES
Clock Frequency-Max	83 MHz	Combinatorial Delay of a CLB-Max	5.6 ns
JESD-30 Code	R-PQFP-G100	JESD-609 Code	e0
Length	20 mm	Moisture Sensitivity Level	3
Number of CLBs	64	Number of Equivalent Gates	2000
Number of Inputs	84	Number of Logic Cells	64
Number of Outputs	84	Number of Terminals	100
Operating Temperature-Max	85 °C	Operating Temperature-Min
Organization	64 CLBS, 2000 GATES	Peak Reflow Temperature (Cel)	225
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	3.4 mm	Supply Voltage-Max	5.25 V
Supply Voltage-Min	4.75 V	Supply Voltage-Nom	5 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	OTHER	Terminal Finish	Tin/Lead (Sn85Pb15)
Terminal Form	GULL WING	Terminal Pitch	0.65 mm
Terminal Position	QUAD	Time@Peak Reflow Temperature-Max (s)	30
Width	14 mm