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See Technical Specifications

XCS40-4PQ240C +BOM

High-density Xilinx device

Manufacturer:

XILINX
Mfr.Part #:

XCS40-4PQ240C
Datasheet:

XCS40-4PQ240C Datasheet (PDF)
Part Life Cycle Code:

Obsolete
Pin Count:

240
HTS Code:

8542.39.00.01
Additional Feature:

MAXIMUM USABLE GATES 40000
EDA/CAD Models:

Request Free CAD Models for XCS40-4PQ240C

XCS40-4PQ240C General Description

The Xilinx XCS40-4PQ240C FPGA is a powerhouse of a device, offering an impressive array of features for low-power, high-performance applications. With its 40,960 logic cells, 140 I/O pins, and 128 macrocells, it provides ample resources for implementing complex logic functions efficiently. Operating at a supply voltage ranging from 1.5V to 1.8V and with a typical static power consumption of 15mW, it strikes an excellent balance between power efficiency and performance

Specifications

Part Life Cycle Code	Obsolete	Pin Count	240
Reach Compliance Code		HTS Code	8542.39.00.01
Additional Feature	MAXIMUM USABLE GATES 40000	Clock Frequency-Max	166 MHz
Combinatorial Delay of a CLB-Max	1.2 ns	JESD-30 Code	S-PQFP-G240
JESD-609 Code	e0	Length	32 mm
Moisture Sensitivity Level	3	Number of CLBs	784
Number of Equivalent Gates	13000	Number of Inputs	205
Number of Logic Cells	784	Number of Outputs	205
Number of Terminals	240	Operating Temperature-Max	85 °C
Operating Temperature-Min		Organization	784 CLBS, 13000 GATES
Peak Reflow Temperature (Cel)	225	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	4.1 mm
Supply Voltage-Max	5.25 V	Supply Voltage-Min	4.75 V
Supply Voltage-Nom	5 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	OTHER
Terminal Finish	Tin/Lead (Sn85Pb15)	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	30	Width	32 mm