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A1020B-CQ84B +BOM

FPGA ACT 1 Family with 2K gates and 547 cells, operating at 48MHz with 1.0um technology and a 5V power supply in a 84-pin CQFP package

Manufacturer:

MICROSEMI CORP
Mfr.Part #:

A1020B-CQ84B
Datasheet:

A1020B-CQ84B Datasheet (PDF)
Part Life Cycle Code:

Obsolete
ECCN Code:

3A001.A.2.C
HTS Code:

8542.39.00.01
Additional Feature:

MAX 69 I/OS
EDA/CAD Models:

Request Free CAD Models for A1020B-CQ84B

A1020B-CQ84B General Description

Microchip Technology's A1020B-CQ84B FPGA, part of the ACT 1 family, stands out as a versatile and efficient solution for electronic system design. With 1020 logic elements (LEs) and 68 embedded RAM blocks, this FPGA offers strong computational capabilities, complemented by 12 dedicated multipliers for efficient arithmetic operations. Its quad flat package (QFP) with 84 pins provides ample connectivity for interfacing with other components, while its support for various configurable I/O standards enhances its adaptability across different applications. Furthermore, security is a key priority for the A1020B-CQ84B, with features like device-level encryption to protect sensitive designs. Operating at a supply voltage of 3.3V, this FPGA strikes a balance between power consumption and performance, making it an attractive choice for designers seeking efficiency and reliability in their electronic systems

Key Features

Highly Predictable Performance with 100% Automatic Placement and Routing
Device Sizes from 1,200 to 20,000 Gates
Up to 6 Fast, Low-Skew Clock Networks
Up to 202 User-Programmable I/O Pins
More Than 500 Macro Functions
Up to 1,276 Dedicated Flip-Flops
I/O Drive to 10 mA
Devices Available to DSCC SMD
CQFP and CPGA Packaging
Nonvolatile, User Programmable
Logic Fully Tested Prior to Shipment
100% Military Temperature Tested (–55°C to +125°C)
QML Certified Devices
Proven Reliability Data Available
Successful Military/Avionics Supplier for Over 10 Years
ACT 3 Features
Highest-Performance, Highest-Capacity FPGA Family
System Performance to 60 MHz over Military Temperature
Low-Power 0.8µ CMOS Technology
3200DX Features
100 MHz System Logic Integration
Highest Speed FPGA SRAM, up to 2.5 kbits Configurable Dual-Port SRAM
Fast Wide-Decode Circuitry
Low-Power 0.6µ CMOS Technology
1200XL Features
Pin for Pin Compatible with ACT 2
System Performance to 50 MHz over Military Temperature
Low-Power 0.6µ CMOS Technology
ACT 2 Features
Best-Value, High-Capacity FPGA Family
System Performance to 40 MHz over Military Temperature
Low-Power 1.0µ CMOS Technology
ACT 1 Features
Lowest-Cost FPGA Family
System Performance to 20 MHz over Military Temperature
Low-Power 1.0µ CMOS Technology

Specifications

Part Life Cycle Code	Obsolete	Reach Compliance Code
ECCN Code	3A001.A.2.C	HTS Code	8542.39.00.01
Additional Feature	MAX 69 I/OS	Clock Frequency-Max	37 MHz
Combinatorial Delay of a CLB-Max	5.5 ns	JESD-30 Code	S-CQFP-F84
JESD-609 Code	e0	Length	16.51 mm
Number of CLBs	547	Number of Equivalent Gates	2000
Number of Inputs	69	Number of Logic Cells	547
Number of Outputs	69	Number of Terminals	84
Operating Temperature-Max	125 °C	Operating Temperature-Min	-55 °C
Organization	547 CLBS, 2000 GATES	Peak Reflow Temperature (Cel)	225
Power Supplies	5 V	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Screening Level	MIL-STD-883 Class B
Seated Height-Max	2.54 mm	Supply Voltage-Max	5.5 V
Supply Voltage-Min	4.5 V	Supply Voltage-Nom	5 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	MILITARY	Terminal Finish	TIN LEAD
Terminal Form	FLAT	Terminal Pitch	0.635 mm
Terminal Position	QUAD	Time@Peak Reflow Temperature-Max (s)	20
Width	16.51 mm