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LCMXO3LF-6900C-5BG400C 400-CABGA (17x17)

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LCMXO3LF-6900C-5BG400C +BOM

BGA-400 package for the LCMXO3LF-6900C-5BG400C PLD from the MachXO3LF Series, featuring a total of 6864 LUTs and 335 I/O connections

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

LCMXO3LF-6900C-5BG400C
Datasheet:

LCMXO3LF-6900C-5BG400C Datasheet (PDF)
Part Life Cycle Code:

Active
Reach Compliance Code:

compliant
ECCN Code:

3A991.D
HTS Code:

8542.39.00.01
EDA/CAD Models:

Request Free CAD Models for LCMXO3LF-6900C-5BG400C

LCMXO3LF-6900C-5BG400C General Description

The LCMXO3LF-6900C-5BG400C is a cutting-edge Field Programmable Gate Array (FPGA) from Lattice Semiconductor, designed to deliver exceptional performance while consuming minimal power. This FPGA, belonging to the XO3 family, is equipped with 6900 LUTs (Look-Up Tables) - the essential components for implementing logic functions. Operating at a maximum speed grade of -5, it is well-suited for high-speed applications, making it an ideal choice for demanding tasks. Additionally, the "LF" designation signifies its adherence to lead-free manufacturing standards, ensuring environmental responsibility and compliance

Key Features

Non-volatile, Infinitely Reconfigurable
Instant-on – powers up in microseconds
Single chip, no external configuration memory
required
Excellent design security, no bit stream to
intercept
Reconfigure SRAM based logic in milliseconds
SRAM and non-volatile memory programmable
through JTAG port
Supports background programming of
non-volatile memory
Sleep Mode
Allows up to 100x static current reduction
TransFR™ Reconfiguration (TFR)
In-field logic update while system operates
High I/O to Logic Density
256 to 2280 LUT4s
73 to 271 I/Os with extensive package options
Density migration supported
Lead free/RoHS compliant packaging
Embedded and Distributed Memory
Up to 27.6 Kbits sysMEM™ Embedded Block
Up to 7.5 Kbits distributed RAM
Dedicated FIFO control logic
Flexible I/O Buffer
Programmable sysIO™ buffer supports wide
range of interfaces:
− LVCMOS 3.3/2.5/1.8/1.5/1.2
− LVTTL
− LVDS, Bus-LVDS, LVPECL, RSDS
sysCLOCK™ PLLs
Up to two analog PLLs per device
Clock multiply, divide, and phase shifting
System Level Support
IEEE Standard 1149.1 Boundary Scan
Onboard oscillator
Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
power supply
IEEE 1532 compliant in-system programming

Specifications

Part Life Cycle Code	Active	Reach Compliance Code	compliant
ECCN Code	3A991.D	HTS Code	8542.39.00.01
Additional Feature	ALSO OPERATES AT 3.3 V NOMINAL SUPPLY	JESD-30 Code	S-PBGA-B400
JESD-609 Code	e1	Length	17 mm
Moisture Sensitivity Level	3	Number of CLBs	858
Number of Terminals	400	Operating Temperature-Max	85 °C
Operating Temperature-Min		Organization	858 CLBS
Peak Reflow Temperature (Cel)	260	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Seated Height-Max	1.7 mm	Supply Voltage-Max	3.465 V
Supply Voltage-Min	2.375 V	Supply Voltage-Nom	2.5 V
Surface Mount	YES	Temperature Grade	OTHER
Terminal Finish	TIN SILVER COPPER	Terminal Form	BALL
Terminal Pitch	0.8 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	30	Width	17 mm
Series	MachXO3	Programmabe	Not Verified
Number of LABs/CLBs	858	Number of Logic Elements/Cells	6864
Total RAM Bits	245760	Number of I/O	335
Voltage - Supply	2.375V ~ 3.465V	Mounting Type	Surface Mount
Operating Temperature	0°C ~ 85°C (TJ)	Base Product Number	LCMXO3