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LS1021ASE7HNB +BOM

Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security enabled

LS1021ASE7HNB General Description

Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security enabled

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Key Features

Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security enabled
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Application

  • Communication Infrastructure
  • Industrial
  • Smart Home
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Specifications

Silicon Rev Rev 2 Family QorIQ LS1021A
Development Tools TWR-LS1021A Qualification tier Industrial
Core Type Arm Cortex-A7 Core: Number of cores (SPEC) 2
Operating Frequency [Max] (MHz) 800 Typical Power 1.97
Cache (KB) 32 L1 Cache (KB) 32
L2 Cache (Max) (KB) 512 SRAM (kB) 128
External Memory Supported DDR3L SDRAM,DDR4 SDRAM DRAM frequency (max)(MHz) 1300
GPU 2D / GPU 3D 2D ACE Serial Audio Interface (SAI) 4
I<sup>2</sup>S 4 SPI 2
QSPI 1 UART 10
I<sup>2</sup>C 3 USB Controllers 2
CAN 4 Ethernet Ports 3
Ethernet Type 100M,10M,1G PCIe 2
PCIe version PCIe 2.0 SATA 1 x SATA 3.0
Encryption Y Watchdog timer Y
Timers 8 Debug &amp; Trace JTAG
Junction Temperature (Min to Max) (&#8451;) 0 to 105
NXP LS1021A Processor Block Diagram

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LS1021ASE7HNB Datasheet PDF

Preliminary Specification LS1021ASE7HNB PDF Download

LS1021ASE7HNB PDF Preview

In Stock: 7,175

Minimum Order: 1

Qty. Unit Price Ext. Price
1+ $22.862 $22.86
200+ $8.848 $1,769.60
500+ $8.537 $4,268.50
1000+ $8.383 $8,383.00

The prices below are for reference only.

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