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See Technical Specifications

NT5DS32M16DS-5T +BOM

DDR SDRAM DRAM Chip

Manufacturer:

NANYA
Mfr.Part #:

NT5DS32M16DS-5T
Datasheet:

NT5DS32M16DS-5T Datasheet (PDF)
Package/Case:

TSOP
Product Type:

Memory
EDA/CAD Models:

Request Free CAD Models for NT5DS32M16DS-5T

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

Double data rate architecture: two data transfers per clock cycle

Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver

DQS is edge-aligned with data for reads and is center aligned with data for writes

Differential clock inputs (CK and CK)

Four internal banks for concurrent operation

Data mask (DM) for write data

DLL aligns DQ and DQS transitions with CK transitions, also aligns QFC transitions with CK during Read cyclesCommands entered on each positive CK edge; data and data mask referenced to both edges of DQS

Burst lengths: 2, 4, or 8

CAS Latency: 2, 2.5

Auto Precharge option for each burst access

Auto Refresh and Self Refresh Modes

15.6ms Maximum Average Periodic Refresh Interval

Supports tRAS lockout feature

2.5V (SSTL_2 compatible) I/O

VDDQ = 2.5V0.2V

VDD = 2.5V0.2V

-7K parts support PC2100 modules.

-75B parts support PC2100 modules

-8B parts support PC1600 modules

Specifications

Product Category

Memory ICs

Service Policies and Others

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Packing

AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

Warranty

365-Day Product

Quality Guarantee

We promise to provide 365 days quality assurance service for all our products.

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In Stock: 5,962

Minimum Order: 1

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NT5DS32M16DS-5T

NANYA

Availability: 5,962 PCS

TSOP

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NT5DS32M16DS-5T +BOM

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