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See Technical Specifications

W9751G6JB-25 +BOM

DDR2 ; 512M HZ /CL3, Lead free

Manufacturer:

WINBOND
Mfr.Part #:

W9751G6JB-25
Datasheet:

W9751G6JB-25 Datasheet (PDF)
ECCN (US):

EAR99
HTS:

8541.29.00.95
SVHC:

Yes
SVHC Exceeds Threshold:

Yes
EDA/CAD Models:

Request Free CAD Models for W9751G6JB-25

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

Power Supply: VDD, VDDQ = 1.8 V  0.1V
Double Data Rate architecture: two data transfers per clock cycle
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and CLK )
Data masks (DM) for write data
Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS
Posted CAS programmable additive latency supported to make command and data bus efficiency
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = Read Latency - 1 (WL = RL - 1)
Interface: SSTL_18
Packaged in WBGA 84 Ball (8X12.5 mm2), using Lead free materials with RoHS compliant

Specifications

ECCN (US)	EAR99	Part Status	Active
HTS	8541.29.00.95	SVHC	Yes
SVHC Exceeds Threshold	Yes	Automotive	No
PPAP	No	Category	Power MOSFET
Configuration	Single Quad Drain Triple Source	Process Technology	ThunderFET
Channel Mode	Enhancement	Channel Type	P
Number of Elements per Chip	1	Maximum Drain Source Voltage (V)	100
Maximum Gate Source Voltage (V)	±20	Maximum Gate Threshold Voltage (V)	2.6
Operating Junction Temperature (°C)	-55 to 150	Maximum Continuous Drain Current (A)	48
Maximum Gate Source Leakage Current (nA)	100	Maximum IDSS (uA)	1
Maximum Drain Source Resistance (mOhm)	20@10V	Typical Gate Charge @ Vgs (nC)	[email protected]\|58@10V
Typical Gate Charge @ 10V (nC)	58	Typical Gate to Drain Charge (nC)	10.2
Typical Gate to Source Charge (nC)	12.9	Typical Reverse Recovery Charge (nC)	152
Typical Input Capacitance @ Vds (pF)	3395@50V	Typical Reverse Transfer Capacitance @ Vds (pF)	55@50V
Minimum Gate Threshold Voltage (V)	1.4	Typical Output Capacitance (pF)	910
Maximum Power Dissipation (mW)	5200	Typical Fall Time (ns)	15\|18
Typical Rise Time (ns)	17\|51	Typical Turn-Off Delay Time (ns)	70\|38
Typical Turn-On Delay Time (ns)	15\|76	Minimum Operating Temperature (°C)	-55
Maximum Operating Temperature (°C)	150	Packaging	Tape and Reel
Maximum Power Dissipation on PCB @ TC=25°C (W)	5.2	Maximum Pulsed Drain Current @ TC=25°C (A)	300
Maximum Junction Ambient Thermal Resistance on PCB (°C/W)	60	Typical Diode Forward Voltage (V)	0.81
Typical Gate Plateau Voltage (V)	4	Typical Reverse Recovery Time (ns)	62
Maximum Diode Forward Voltage (V)	1.2	Minimum Gate Resistance (Ohm)	1
Maximum Gate Resistance (Ohm)	5.5	Maximum Positive Gate Source Voltage (V)	20
Maximum Continuous Drain Current on PCB @ TC=25°C (A)	11.6	Mounting	Surface Mount
PCB changed	8	Pin Count	8