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With 5K gates and 238 cells
QFP100Manufacturer:
Mfr.Part #:
XCS05-3VQG100C
Datasheet:
Part Life Cycle Code:
Obsolete
Pin Count:
100
Reach Compliance Code:
compliant
HTS Code:
8542.39.00.01
EDA/CAD Models:
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Featuring 36 input/output pins with configurable combinatorial and registered outputs, the XCS05-3VQG100C offers a variety of options for interfacing with external components. The programmable slew rate control and internal pull-up resistors on all inputs enhance the device's flexibility and enable designers to optimize signal integrity in their designs. Additionally, advanced features like clock conditioning circuits, a dedicated JTAG programming interface, and an on-chip oscillator for clock generation further enhance the capabilities of this CPLD
Part Life Cycle Code | Obsolete | Pin Count | 100 |
Reach Compliance Code | compliant | HTS Code | 8542.39.00.01 |
Additional Feature | MAXIMUM USABLE GATES 5000 | Clock Frequency-Max | 125 MHz |
Combinatorial Delay of a CLB-Max | 1.6 ns | JESD-30 Code | S-PQFP-G100 |
JESD-609 Code | e3 | Length | 14 mm |
Moisture Sensitivity Level | 3 | Number of CLBs | 100 |
Number of Equivalent Gates | 2000 | Number of Terminals | 100 |
Operating Temperature-Max | 85 °C | Operating Temperature-Min | |
Organization | 100 CLBS, 2000 GATES | Peak Reflow Temperature (Cel) | 260 |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | Qualification Status | Not Qualified |
Seated Height-Max | 1.2 mm | Supply Voltage-Max | 5.25 V |
Supply Voltage-Min | 4.75 V | Supply Voltage-Nom | 5 V |
Surface Mount | YES | Technology | CMOS |
Temperature Grade | OTHER | Terminal Finish | Matte Tin (Sn) |
Terminal Form | GULL WING | Terminal Pitch | 0.5 mm |
Terminal Position | QUAD | Time@Peak Reflow Temperature-Max (s) | 30 |
Width | 14 mm |
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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.
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