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74LVC1G125GV,125 +BOM

32mA 1 1.65V~5.5V 32mA 1 SOT-753 Buffer/Driver/Transceiver ROHS

74LVC1G125GV,125 General Description

The 74LVC1G125GV is a reliable single buffer/line driver designed for flexibility in mixed 3.3 V and 5 V environments. Its 3-state output and Schmitt-trigger action make it tolerant of slower input rise and fall times, while its fully specified partial power down applications using I ensure that the output is disabled to prevent backflow current during power down. With the ability to drive inputs from 3.3 V or 5 V devices, this device serves as a versatile translator for a wide range of applications

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Key Features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • CMOS low power consumption
  • IOFF circuitry provides partial Power-down mode operation
  • ±24 mA output drive (VCC = 3.0 V)
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Complies with JEDEC standards:JESD8-7 (1.65 V to 1.95 V)JESD8-5 (2.3 V to 2.7 V)JESD8C (2.7 V to 3.6 V)JESD36 (4.5 V to 5.5 V)
  • JESD8-7 (1.65 V to 1.95 V)
  • JESD8-5 (2.3 V to 2.7 V)
  • JESD8C (2.7 V to 3.6 V)
  • JESD36 (4.5 V to 5.5 V)
  • ESD protection:HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 VCDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
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Specifications

Type number 74LVC1G125GV VCC (V) 1.65 - 5.5
Logic switching levels CMOS/LVTTL Output drive capability (mA) ± 32
fmax (MHz) 175 Nr of bits 1
Power dissipation considerations low Tamb (°C) -40~125
Rth(j-a) (K/W) 270 Rth(j-c) (K/W) 169
Packing SOT753_125 Orderable part number 74LVC1G125GV,125
Chemical content 74LVC1G125GV

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