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See Technical Specifications

EDE1116AEBG-6E-F +BOM

DDR DRAM, 64MX16, 0.45ns, CMOS, PBGA84, HALOGEN FREE AND ROHS COMPLIANT, FBGA-84

Manufacturer:

ELPIDA
Mfr.Part #:

EDE1116AEBG-6E-F
Datasheet:

EDE1116AEBG-6E-F Datasheet (PDF)
Package/Case:

BGA
Product Type:

Memory
EDA/CAD Models:

Request Free CAD Models for EDE1116AEBG-6E-F

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Key Features

Double-data-rate architecture; two data transfers per clock cycle

The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture

Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver

DQS is edge-aligned with data for READs; center aligned with data for WRITEs

Differential clock inputs (CK and /CK)

DLL aligns DQ and DQS transitions with CK transitions

Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS

Data mask (DM) for write data

Posted /CAS by programmable additive latency for better command and data bus efficiency

Programmable RDQS, /RDQS output for making 8 organization compatible to 4 organization

/DQS, (/RDQS) can be disabled for single-ended Data Strobe operation

Off-Chip Driver (OCD) impedance adjustment is not supported.

Specifications

Product Category

Memory ICs

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In Stock: 5,837

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