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GAL18V10B-15LP +BOM

This device comes in a PDIP20 package made of plastic, with a DIP-20 pin configuration

GAL18V10B-15LP General Description

The GAL18V10B-15LP from Lattice Semiconductor is a cutting-edge Complex Programmable Logic Device designed to meet the demands of modern electronic applications. With its 10 macrocells and 54 inputs, this CPLD offers unparalleled flexibility and performance for designers. Its fast propagation delay of up to 15ns ensures quick and efficient operation, making it a reliable choice for time-sensitive applications

Key Features

HIGH PERFORMANCE E

2

CMOSTECHNOLOGY

7.5 ns Maximum Propagation Delay

Fmax = 111 MHz

5.5 ns Maximum from Clock Input to Data Output

TTL Compatible 16 mA Outputs

UltraMOS Advanced CMOS Technology

LOW POWER CMOS

75 mA Typical Icc

ACTIVE PULL-UPS ON ALL PINS

E2CELL TECHNOLOGY

Reconfigurable Logic

Reprogrammable Cells

100% Tested/100% Yields

High Speed Electrical Erasure (<100ms)

20 Year Data Retention

TEN OUTPUT LOGIC MACROCELLS

Uses Standard 22V10 Macrocell Architecture

Maximum Flexibility for Complex Logic Designs

PRELOAD AND POWER-ON RESET OF REGISTERS

100% Functional Testability

APPLICATIONS INCLUDE:

DMA Control

State Machine Control

High Speed Graphics Processing

Standard Logic Speed Upgrade

ELECTRONIC SIGNATURE FOR IDENTIFICATION

Specifications

Programmabe Not Verified Programmable Type EE PLD
Number of Macrocells 10 Voltage - Input -
Speed - Mounting Type Through Hole

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