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See Technical Specifications

GAL22V10D-15QPN +BOM

The GAL22V10D-15QPN is a high-performance SPLD (Simple Programmable Logic Device) that utilizes E2CMOS technology

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

GAL22V10D-15QPN
Datasheet:

GAL22V10D-15QPN Datasheet (PDF)
Programmabe:

Not Verified
Programmable Type:

EE PLD
Number Of Macrocells:

10
Speed:

15 ns
EDA/CAD Models:

Request Free CAD Models for GAL22V10D-15QPN

GAL22V10D-15QPN General Description

The GAL22V10D-15QPN from Lattice Semiconductor is a Programmable Logic Device (PLD) that stands out for its high level of versatility and performance. Featuring 22 inputs and 10 outputs, this PLD allows for flexible logic implementation, utilizing a combination of AND, OR, and XOR gates. Operating on a 5V power supply, it ensures high-speed performance with a maximum propagation delay of 15ns. Housed in a 28-pin PLCC package, it offers a compact and efficient solution for prototyping and testing different logic designs. What sets this PLD apart is its reprogrammable nature, allowing for multiple programming and reprogramming cycles, making it a cost-effective choice for various logic functions. With 20 logic macrocells that can be programmed independently, it provides versatile logic functionality, catering to a wide range of applications in industries such as telecommunications, automotive, and consumer electronics. Its high speed and low power consumption make it an attractive option for implementing complex logic functions

Key Features

HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— 4 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.5 ns Maximum from Clock Input to Data Output
— UltraMOS® Advanced CMOS Technology
ACTIVE PULL-UPS ON ALL PINS
COMPATIBLE WITH STANDARD 22V10 DEVICES
— Fully Function/Fuse-Map/Parametric Compatible with Bipolar and UVCMOS 22V10 Devices
50% to 75% REDUCTION IN POWER VERSUS BIPOLAR
— 90mA Typical Icc on Low Power Device
— 45mA Typical Icc on Quarter Power Device
E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
TEN OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
PRELOAD AND POWER-ON RESET OF REGISTERS
— 100% Functional Testability