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See Technical Specifications

GAL22V10D-25LJN +BOM

GAL22V10D-25LJN is a lead-free, CMOS programmable logic device with a 25ns speed rating and PAL-Type architecture in a PQCC28 package

Manufacturer:

Lattice Semiconductor Corporation
Mfr.Part #:

GAL22V10D-25LJN
Datasheet:

GAL22V10D-25LJN Datasheet (PDF)
Programmabe:

Not Verified
Programmable Type:

EE PLD
Number Of Macrocells:

10
Speed:

25 ns
EDA/CAD Models:

Request Free CAD Models for GAL22V10D-25LJN

GAL22V10D-25LJN General Description

The GAL22V10D-25LJN, a programmable logic device manufactured by Lattice Semiconductor Corporation, features 22 inputs, 10 outputs, and 10 macrocells that can be customized through hardware programming. Operating at a maximum speed of 25 MHz with low power consumption, it is suitable for a wide range of applications, such as telecommunications, consumer electronics, and industrial automation. This device, utilizing CMOS technology, is equipped with a JEDEC JTAG boundary-scan test access port for convenient programming and debugging. Additionally, a user-programmable security bit adds an extra layer of protection to prevent unauthorized access to the configuration data

Key Features

HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— 4 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.5 ns Maximum from Clock Input to Data Output
— UltraMOS® Advanced CMOS Technology
ACTIVE PULL-UPS ON ALL PINS
COMPATIBLE WITH STANDARD 22V10 DEVICES
— Fully Function/Fuse-Map/Parametric Compatible with Bipolar and UVCMOS 22V10 Devices
50% to 75% REDUCTION IN POWER VERSUS BIPOLAR
— 90mA Typical Icc on Low Power Device
— 45mA Typical Icc on Quarter Power Device
E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
TEN OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
PRELOAD AND POWER-ON RESET OF REGISTERS
— 100% Functional Testability