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PDTA114EU +BOM

NXP Semiconductors

email Email: [email protected]
skype Skype: live:.cid.ab6b29428937b76
tel Tel: +852 95804164

PDTA114EU General Description

PNP Resistor-Equipped Transistor (RET) in a small SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package.NPN complement: PDTC114EU

Key Features

  • 100 mA output current capability
  • Built-in bias resistors
  • Simplifies circuit design
  • Reduces component count
  • Reduces pick and place costs

Application

  • Digital application in automotive and industrial segments
  • Cost-saving alternative for BC847 series in digital applications
  • Controlling IC inputs
  • Switching loads

Specifications

Source Content uid PDTA114EU Pbfree Code Yes
Part Life Cycle Code Transferred Pin Count 3
Reach Compliance Code compliant ECCN Code EAR99
HTS Code 8541.21.00.95 Additional Feature BUILT-IN BIAS RESISTOR RATIO IS 1
Collector Current-Max (IC) 0.1 A Collector-Emitter Voltage-Max 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR DC Current Gain-Min (hFE) 30
JESD-30 Code R-PDSO-G3 JESD-609 Code e3
Moisture Sensitivity Level 1 Number of Elements 1
Number of Terminals 3 Operating Temperature-Max 150 °C
Peak Reflow Temperature (Cel) 260 Polarity/Channel Type PNP
Power Dissipation-Max (Abs) 0.2 W Qualification Status Not Qualified
Surface Mount YES Terminal Finish Tin (Sn)
Terminal Form GULL WING Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30 Transistor Application SWITCHING
Transistor Element Material SILICON

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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.

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In Stock: 6,559

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