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K4S561632D-TC75 +BOM

Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54

Key Features

JEDEC standard 3.3V power supply

LVTTL compatible with multiplexed address

Four banks operation

MRS cycle with address key programs

-. CAS latency (2 & 3)

-. Burst length (1, 2, 4, 8 & Full page)

-. Burst type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the system

clock.

Burst read single-bit write operation

DQM for masking

Auto & self refresh

64ms refresh period (8K Cycle)

Specifications

Product Category Memory ICs

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