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See Technical Specifications

M2004-01-666.5140 +BOM

Frequency Translation PLL

Manufacturer:

Renesas Electronics Corporation
Mfr.Part #:

M2004-01-666.5140
Datasheet:

M2004-01-666.5140 Datasheet (PDF)
Programmabe:

Not Verified
PLL:

Yes
Input:

LVCMOS, LVTTL
Output:

LVPECL

M2004-01-666.5140 General Description

The M2004 variants -01 and -11 are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation in a high-speed data communications system. The clock multiplication ratio and output divider ratio are pin selectable and also configurable through serial programming. External loop components allow the tailoring of PLL loop response. The M2004-11 adds Hitless Switching with Phase Build-out (HS/PBO) to ensure that reference clock reselection does not disrupt the output clock.

Key Features

Ideal for OC-48/192 data clock
Integrated SAW (surface acoustic wave) delay line
VCSO frequency from 300 to 700MHz (Specify VCSO center frequency at time of order)
Low phase jitter of
Pin-selectable or serially programmed configuration
The M2004-11 adds Hitless Switching with Phase Build-out (HS/PBO) to ensure SONET/SDH MTIE and TDEV compliance during reference clock reselection
Reference clock inputs support single-ended LVCMOS, LVTTL
Industrial temperature available
Single 3.3V power supply
Small 9 x 9 mm SMT (surface mount) package

Specifications

Series	-	Programmabe	Not Verified
PLL	Yes	Input	LVCMOS, LVTTL
Output	LVPECL	Number of Circuits	1
Ratio - Input:Output	2:1	Differential - Input:Output	No/Yes
Frequency - Max	666.514MHz	Divider/Multiplier	Yes/No
Voltage - Supply	3.135V ~ 3.465V	Operating Temperature	0°C ~ 70°C
Mounting Type	Surface Mount	Base Product Number	M2004-01