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M2020-13I622.0800T +BOM

VCSO Based Clock PLL

  • Manufacturer:

    Renesas Electronics Corporation

  • Mfr.Part #:

    M2020-13I622.0800T

  • Datasheet:

    M2020-13I622.0800T Datasheet (PDF) pdf-icon

  • Programmabe:

    Not Verified

  • PLL:

    Yes

  • Input:

    LVCMOS, LVDS, LVPECL, LVTTL

  • Output:

    LVPECL

M2020-13I622.0800T General Description

The M2020/21 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting 2.5-10 GB data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M2020/21 module includes a proprietary SAW (surface acoustic wave) delay line as part of the VCSO. This results in a high frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.

Key Features

  • Integrated SAW (surface acoustic wave) delay line
  • Low phase jitter of
  • Output frequencies of 15 to 700 MHz *
  • LVPECL clock output (CML and LVDS options available)
  • Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOS, LVTTL
  • Loss of Lock (LOL) output pin
  • Narrow Bandwidth control input (NBW pin)
  • Hitless Switching (HS) options with or without Phase Build-out (PBO) available for SONET (GR-253) / SDH (G.813) MTIE and TDEV compliance during reference clock reselection
  • Industrial temperature grade available
  • Single 3.3V power supply
  • Small 9 x 9 mm SMT (surface mount) package

Specifications

Series - Programmabe Not Verified
PLL Yes Input LVCMOS, LVDS, LVPECL, LVTTL
Output LVPECL Number of Circuits 1
Ratio - Input:Output 2:2 Differential - Input:Output Yes/Yes
Frequency - Max 622.08MHz Divider/Multiplier Yes/No
Voltage - Supply 3.135V ~ 3.465V Operating Temperature -40°C ~ 85°C
Mounting Type Surface Mount Base Product Number M2020-13

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