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VCSO Based Clock PLL
36-CLCCManufacturer:
Renesas Electronics Corporation
Mfr.Part #:
M2020-13I622.0800T
Datasheet:
Programmabe:
Not Verified
PLL:
Yes
Input:
LVCMOS, LVDS, LVPECL, LVTTL
Output:
LVPECL
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The M2020/21 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting 2.5-10 GB data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M2020/21 module includes a proprietary SAW (surface acoustic wave) delay line as part of the VCSO. This results in a high frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.
Series | - | Programmabe | Not Verified |
PLL | Yes | Input | LVCMOS, LVDS, LVPECL, LVTTL |
Output | LVPECL | Number of Circuits | 1 |
Ratio - Input:Output | 2:2 | Differential - Input:Output | Yes/Yes |
Frequency - Max | 622.08MHz | Divider/Multiplier | Yes/No |
Voltage - Supply | 3.135V ~ 3.465V | Operating Temperature | -40°C ~ 85°C |
Mounting Type | Surface Mount | Base Product Number | M2020-13 |
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