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See Technical Specifications

M2006-02-669.6429 +BOM

VCSO Based FEC Clock PLL

Manufacturer:

Renesas Electronics Corporation
Mfr.Part #:

M2006-02-669.6429
Datasheet:

M2006-02-669.6429 Datasheet (PDF)
Programmabe:

Not Verified
PLL:

Yes
Input:

LVDS, LVPECL
Output:

LVPECL

M2006-02-669.6429 General Description

The M2006-02 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation. The device supports both forward and inverse FEC (Forward Error Correction) clock multiplication ratios, pin-selected from pre-programming look-up tables.

Key Features

Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation, including:
255/238 (OTU1) Mapping and 238/255 De-mapping
255/237 (OTU2) Mapping and 237/255 De-mapping
255/236 (OTU3) Mapping and 236/255 De-mapping
Supports input reference and VCSO frequencies up to 700MHz, supports loop timing modes (Specify VCSO frequency at time of order)
Low phase jitter
Supports active switching between inverse-FEC and non-FEC clock ratios (same VCSO center frequency)
Ideal for complex ratio FEC ratio translation* and for use with an unstable reference** (i.e., similar to the M2006-12 - and pin-compatible - but without the Hitless Switching and Phase Build-out functions)
Commercial and Industrial temperature grades
Single 3.3V power supply
Small 9 x 9 mm SMT (surface mount) package
Pb-free / Compliant to EC RoHS Directive (RoHS 6/6)

Specifications

Series	-	Programmabe	Not Verified
PLL	Yes	Input	LVDS, LVPECL
Output	LVPECL	Number of Circuits	1
Ratio - Input:Output	2:2	Differential - Input:Output	Yes/Yes
Frequency - Max	669.6429MHz	Divider/Multiplier	Yes/No
Voltage - Supply	3.135V ~ 3.465V	Operating Temperature	0°C ~ 70°C
Mounting Type	Surface Mount	Base Product Number	M2006-02